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AI at the Edge Using PULP + eFPGA
Low-Profile, High Power Density Solutions for Xilinx FPGAs
Design of an eFPGA
eFPGA Use Case: Hardware Offloaded/Accelerated DSP
Considering Using eFPGA IP in Your Next Chip Here’s How, Andy Jaros, Flex Logix
eFPGA optimized for AI applications.
Menta eFPGA technology for a changing world
Menta, process independent eFPGA
Increase Performance, Reduce die size with Speedcore eFPGA Custom Blocks Flow | Achronix
eFPGA vs. FPGA Design Methodologies
eFPGA SoC 20181231 110733
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Last Updated: October 21, 2026
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Chen Wang, SVP of engineering at Flex Logix, talks with Semiconductor Engineering about how to Presented by Cheng Wang, Sr. VP, Software, Architecture, Engineering, Flex Logix. Flex Logix's Chen Wang talks with Semiconductor Engineering about timing for an embedded Presentation by Timothy Saxe of QuickLogic and Luca Benini of ETH Zurich on December 4, 2018 at the RISC-V Summit, at the ... See Maxim's low-profile/high power This project was done by Minnu A. L. (TVE17EC028) Misha T. M. (TVE17EC029) Rohit P. Lal (TVE17EC038) Vikil Vijay ... While software is the primary method of solving problems on MCU class machines, access to Andy Jaros VP IP Sales, Marketing & Solutions Architecture Flex Logix. At the Design Automation Conference in San Francisco in 2018, Achronix Vice President of Marketing, Steve Mensor, spoke about ... Namit Varma, senior director of Achronix's India Technology Center, talks with Semiconductor Engineering about the differences ...